SH7706 Datasheet, PDF (472/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 15 Smart Card Interface
15.3.1 Smart Card Mode Register (SCSCMR)
The smart card mode register (SCSCMR) is an 8-bit read/write register that selects smart card
interface functions.
Bit
Bit Name Initial Value R/W
7 to 4 —
—
R
3
SDIR
0
R/W
2
SINV
0
R/W
1
—
—
R
0
SMIF
0
R/W
Description
Reserved
An undefined value are read from these bits.
Smart Card Data Transfer Direction
Selects the serial/parallel conversion format.
0: Contents of SCTDR are transferred as LSB first,
receive data is stored in SCRDR as LSB first.
1: Contents of SCTDR are transferred as MSB first,
receive data is stored in SCRDR as MSB first.
Smart Card Data Inversion
Specifies whether to invert the logic level of the data.
This function is used in combination with bit 3 for
transmitting and receiving with an inverse
convention card. SINV does not affect the logic level
of the parity bit. See section 15.4.4, Register
Settings, for information on how parity is set.
0: Contents of SCTDR are transferred unchanged,
receive data is stored in SCRDR unchanged.
1: Contents of SCTDR are inverted before transfer,
receive data is inverted before storage in SCRDR.
Reserved
An undefined value is read from this bit.
Smart Card Interface Mode Select
Enables the smart card interface function.
0: Smart card interface function disabled
1: Smart card interface function enabled
Rev. 5.00 May 29, 2006 page 424 of 698
REJ09B0146-0500