SH7706 Datasheet, PDF (503/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 16 Serial Communication Interface with FIFO (SCIF)
Initial
Bit Bit Name Value R/W Description
5
TDFE
1
R/(W)* Transmit FIFO Data Empty
Indicates that data is transferred from SCFTDR2 to
SCTSR2, the quantity of data in SCFTDR2 becomes less
than the number of transmission triggers specified by the
TTRG1 and TTRG0 bits in SCFCR2, and writing the
transmit data to SCFTDR is enabled.
0: The quantity of transmit data written to SCFTDR2 is
equal to or greater than the specified number of
transmission triggers.
[Clearing condition]
When data exceeding the specified number of
transmission triggers is written to SCFTDR2, software
reads TDFE after it has been set to 1, then writes 0 to
TDFE
1: End of transmission
[Setting conditions]
1. The chip is power-on reset or enters standby mode.
2. The quantity of transmission data in SCFTDR2
becomes less than the specified number of
transmission triggers as a result of transmission.
Note:
Since SCFTDR2 is a 16-byte FIFO register, the
maximum quantity of data which can be written
when TDFE is 1 is "16 minus the specified number
of transmission triggers". If attempted to write
additional data, the data is ignored. The quantity of
data in SCFTDR2 is indicated by the upper 8 bits of
SCFTDR2.
Rev. 5.00 May 29, 2006 page 455 of 698
REJ09B0146-0500