SH7706 Datasheet, PDF (708/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 24 Electrical Characteristics
AUDCK
AUDATA
AUDSYNC
t_AUDD
t_AUSYD
t_AUDCYC
t_AUDD
Figure 24.59 AUD Timing
24.3.10 A/D Converter Timing
Table 24.10 A/D Converter Timing
Item
External trigger input pulse width
External trigger input start delay time
Input sampling time
(CKS = 0)
(CKS = 1)
A/D conversion
start delay time
(CKS = 0)
(CKS = 1)
A/D conversion time (CKS = 0)
(CKS = 1)
tcyc: Pφ cycle
Symbol
t
TRGW
t_TRGS
t_SPL
t
D
t_CONV
Min
2
50
—
—
17
10
514
259
Typ Max Unit Figure
—
—
tcyc 24.60
—
—
ns
129 —
tcyc 24.61
65
—
—
28
tcyc
—
17
—
525 tcyc
—
266
Rev. 5.00 May 29, 2006 page 660 of 698
REJ09B0146-0500