SH7706 Datasheet, PDF (225/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 8 Bus State Controller (BSC)
8.4.2 Bus Control Register 2 (BCR2)
The bus control register 2 (BCR2) is a 16-bit read/write register that selects the bus-size width and
8-bit port of each area. It is initialized to H'3FF0 by a power-on reset, but is not initialized by a
manual reset or by standby mode. Do not access external memory outside area 0 until BCR2
register initialization is complete.
Bit
15, 14
Bit Name
—
Initial Value R/W
All 0
R
13
A6SZ1
1
R/W
12
A6SZ0
1
R/W
11
A5SZ1
1
R/W
10
A5SZ0
1
R/W
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Area 6 Bus Size Specification
Specify the bus sizes of physical space area 6.
• When port A/B is unused.
00: Reserved (Setting prohibited)
01: Byte (8-bit) size
10: Word (16-bit) size
11: Longword (32-bit) size
• When port A/B is used.
00: Reserved (Setting prohibited)
01: Byte (8-bit) size
10: Word (16-bit) size
11: Reserved (Setting prohibited)
Area 5 Bus Size Specification
Specify the bus sizes of physical space area 5.
• When port A/B is unused.
00: Reserved (Setting prohibited)
01: Byte (8-bit) size
10: Word (16-bit) size
11: Longword (32-bit) size
• When port A/B is used.
00: Reserved (Setting prohibited)
01: Byte (8-bit) size
10: Word (16-bit) size
11: Reserved (Setting prohibited)
Rev. 5.00 May 29, 2006 page 177 of 698
REJ09B0146-0500