SH7706 Datasheet, PDF(454/749 Page) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

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SH7706 Datasheet, PDF (454/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

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Section 14 Serial Communication Interface (SCI)

1

Serial

data

Start

bit

Data

Multi-

processor

bit Stop

bit

Start

bit

0 D0 D1

D 7 0/1 1 0 D 0

Data

Multi-

processor

bit Stop

bit

D1

D 7 0/1 1

1

Idling

(marking)

TDRE

TEND

TXI interrupt

request

generated

Writes data to

TDR with the TXI

interrupt pro-

cessing routine and

clears TDRE bit to 0

TXI interrupt

request

generated

TEI interrupt

request

generated

1 frame

Example: 8-bit data with multiprocessor bit and one stop bit

Figure 14.14 SCI Multiprocessor Transmit Operation

Rev. 5.00 May 29, 2006 page 406 of 698

REJ09B0146-0500

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