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SH7706 Datasheet, PDF (597/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series | |||
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Section 20 D/A Converter (DAC)
Section 20 D/A Converter (DAC)
This LSI includes a D/A converter with two channels.
Figure 20.1 shows a block diagram of the D/A converter.
AVCC
DA1
DA0
AVSS
8-bit D/A
Module data bus
On-chip
data bus
Legend:
DACR: D/A control register
DADR0: D/A data register 0
DADR1: D/A data register 1
Control circuit
Figure 20.1 D/A Converter Block Diagram
20.1 Feature
D/A converter features are listed below.
⢠8-bit resolution
⢠Two output channels
⢠Conversion time: maximum 10 µs (with 20-pF capacitive load)
⢠Output voltage: 0 V to AVcc
Rev. 5.00 May 29, 2006 page 549 of 698
REJ09B0146-0500
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