SH7706 Datasheet, PDF (493/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 16 Serial Communication Interface with FIFO (SCIF)
16.2 Input/Output Pin
The SCIF has the I/O pins summarized in table 16.1.
Table 16.1 SCIF Pins
Pin Name
Serial clock pin
Receive data pin
Transmit data pin
Request to send pin
Clear to send pin
Abbreviation
SCK2
RxD2
TxD2
RTS2
CTS2
I/O
I/O
Input
Output
Output
Input
Function
Clock I/O
Receive data input
Transmit data output
Request to send
Clear to send
16.3 Register Description
SCIF has the registers listed below. These registers specify the data format and bit rate, and
control the transmitter and receiver sections.
Refer to section 23, List of Registers, for more details of the addresses and access sizes.
• Serial mode register 2 (SCSMR2)
• Bit rate register 2 (SCBRR2)
• Serial control register 2 (SCSCR2)
• Transmit FIFO data register 2 (SCFTDR2)
• Serial status register 2 (SCSSR2)
• Receive data FIFO register 2 (SCFRDR2)
• FIFO control register 2 (SCFCR2)
• FIFO data count set register 2 (SCFDR2)
• SC port control register (SCPCR)
• SC port data register (SCPDR)
Rev. 5.00 May 29, 2006 page 445 of 698
REJ09B0146-0500