SH7706 Datasheet, PDF (34/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 23 List of Registers.............................................................................................. 585
23.1 Register Address Map ....................................................................................................... 585
23.2 Register Bits...................................................................................................................... 591
23.3 Register States in Processing Mode .................................................................................. 602
Section 24 Electrical Characteristics.............................................................................. 607
24.1 Absolute Maximum Ratings ............................................................................................. 607
24.2 DC Characteristics ............................................................................................................ 609
24.3 AC Characteristics ............................................................................................................ 612
24.3.1 Clock Timing ....................................................................................................... 612
24.3.2 Control Signal Timing ......................................................................................... 619
24.3.3 AC Bus Timing .................................................................................................... 622
24.3.4 Basic Timing........................................................................................................ 624
24.3.5 Burst ROM Timing .............................................................................................. 627
24.3.6 Synchronous DRAM Timing ............................................................................... 630
24.3.7 PCMCIA Timing ................................................................................................. 647
24.3.8 Peripheral Module Signal Timing........................................................................ 654
24.3.9 H-UDI, AUD Related Pin Timing ....................................................................... 658
24.3.10 A/D Converter Timing......................................................................................... 660
24.3.11 AC Characteristics Measurement Conditions ...................................................... 662
24.3.12 Delay Time Variation Due to Load Capacitance ................................................. 663
24.4 A/D Converter Characteristics .......................................................................................... 664
24.5 D/A Converter Characteristics .......................................................................................... 664
Appendix .................................................................................................................................. 665
A. Equivalent Circuits of I/O Buffer for Each Pin................................................................. 665
B. Pin Functions .................................................................................................................... 669
B.1 Pin Functions ........................................................................................................... 669
B.2 Pin Specifications .................................................................................................... 673
B.3 Processing of Unused Pins....................................................................................... 677
B.4 Pin States in Access to Each Address Space............................................................ 678
C. Product Lineup.................................................................................................................. 692
D. Package Dimensions ......................................................................................................... 693
Index .......................................................................................................................................... 695
Rev. 5.00 May 29, 2006 page xxxiv of xlviii