SH7706 Datasheet, PDF (377/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 12 Timer Unit (TMU)
Bit
Bit Name Initial Value R/W Description
4
CKEG1 0
R/W Clock Edge 1 and 0
3
CKEG0 0
R/W These bits select the external clock edge when the
external clock is selected, or when the input capture
function is used.
00: Count/capture register set on rising edge
01: Count/capture register set on falling edge
1X: Count/capture register set on both rising and
falling edge
Note: X: Don't care
2
TPSC2 0
R/W Timer Prescalers 2 to 0
1
TPSC1 0
0
TPSC0 0
R/W These bits select the TCNT_0 and TCNT_1 count
R/W ^clock.
000: Internal clock: count on Pφ/4
001: Internal clock: count on Pφ/16
010: Internal clock: count on Pφ/64
011: Internal clock: count on Pφ/256
100: Internal clock: count on clock output of on-chip
RTC (RTCCLK)
101: External clock: count on TCLK pin input
110: Reserved (Setting prohibited)
111: Reserved (Setting prohibited)
In case of Channel 2:
Bit Bit Name
15 to —
10
Initial Value R/W
All 0
R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Rev. 5.00 May 29, 2006 page 329 of 698
REJ09B0146-0500