SH7706 Datasheet, PDF (665/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Stable input clock
EXTAL input
or CKIO
input
PLL synchronization
PLL output,
CKIO output
Internal clock
Section 24 Electrical Characteristics
Reset or NMI interrupt request
Stable input clock
t_PLL1
PLL synchronization
STATUS 0
STATUS 1
Normal
Standby
Normal
Note: Oscillation settling time in the Clock-mode-0, 1, 7 and Oscillation-halt-mode
Figure 24.8 PLL Synchronization Settling Time
by Reset or NMI at the Returning from Standby Mode (Return by Reset or NMI)
Stable input clock
EXTAL input
or CKIO input
PLL synchronization
PLL output,
CKIO output
IRQ4 to IRQ0/IRL3 to IRL0 interrupt request
Stable input clock
t_IRLSTB
t_PLL1
PLL synchronization
Internal clock
STATUS 0
STATUS 1
Normal
Standby
Normal
Note: Oscillation settling time in the Clock-mode-0, 1, 7 and Oscillation-halt-mode
Figure 24.9 PLL Synchronization Settling Time
at the Returning from Standby Mode (Return by IRQ/IRL Interrupt)
Rev. 5.00 May 29, 2006 page 617 of 698
REJ09B0146-0500