SH7706 Datasheet, PDF (499/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 16 Serial Communication Interface with FIFO (SCIF)
Initial
Bit Bit Name Value R/W
3, 2 —
All 0 R/W
1
CKE1
0
R/W
0
CKE0
0
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Clock Enable
These bits select the SCIF clock source and enable or
disable clock output from the SCK2 pin. Depending on the
combination of CKE1 and CKE0, the SCK2 pin can be
used for serial clock output or serial clock input.
The CKE0 setting is valid only when the SCI is operating
with the internal clock (CKE1 = 0). The CKE0 setting is
ignored when an external clock source is selected (CKE1 =
1). Always select the SCIF operating mode in the
SCSMR2, before setting CKE1 and CKE0. For further
details on selection of the SCIF clock source, see table
16.7 in section 16.4, Operation.
00: Internal clock, SCK pin used for I/O pin (input signal is
ignored)
01: Internal clock, SCK2 pin used for clock output^*1
10: External clock, SCK2 pin used for clock input^*2
11: External clock, SCK2 pin used for clock input^*2
Notes: 1. The output clock frequency is 16 times the bit
rate.
2. The input clock frequency is 16 times the bit rate.
Rev. 5.00 May 29, 2006 page 451 of 698
REJ09B0146-0500