SH7706 Datasheet, PDF (354/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 10 Clock Pulse Generator (CPG)
10.2 Input/Output Pin
Table 10.1 lists the CPG pins and their functions.
Table 10.1 Clock Pulse Generator Pins and Functions
Pin Name
Mode control pins
Crystal I/O pins (clock
input pins)
Clock I/O pin
Capacitor connection
pins for PLL
Symbol I/O Description
MD0
I
Set the clock operating mode.
MD1
I
MD2
I
XTAL
O Connects a crystal oscillator.
EXTAL I
Connects a crystal oscillator. Also used to input
an external clock.
CKIO
I/O Inputs or outputs an external clock.
CAP1
I
Connects capacitor for PLL circuit 1 operation
(recommended value 470 pF).
CAP2
I
Connects capacitor for PLL circuit 2 operation
(recommended value 470 pF).
10.3 Clock Operating Modes
Table 10.2 shows the relationship between the mode control pin (MD2 to MD0) combinations and
the clock operating modes. Table 10.3 shows the usable frequency ranges in the clock operating
modes and frequency ranges of the input clock (crystal oscillation). Operation cannot be
guaranteed if settings other than those listed in table 10.3 are used.
Rev. 5.00 May 29, 2006 page 306 of 698
REJ09B0146-0500