SH7706 Datasheet, PDF (599/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 20 D/A Converter (DAC)
Bit Bit Name Initial Value R/W Description
7
DAOE1 0
R/W D/A Output Enable 1
Controls D/A conversion and analog output.
0: DA1 analog output is disabled
1: Channel-1 D/A conversion and DA1 analog output
are enabled
6
DAOE0 0
R/W D/A Output Enable 0
Controls D/A conversion and analog output.
0: DA0 analog output is disabled
1: Channel-0 D/A conversion and DA0 analog output
are enabled
5
DAE
0
R/W D/A Enable
Controls D/A conversion, together with bits DAOE0 and
DAOE1. When the DAE bit is cleared to 0, D/A
conversion is controlled independently in channels 0
and 1. When this LSI enters standby mode while D/A
conversion is enabled, the D/A output is held and the
analog power-supply current is equivalent to that during
D/A conversion. To reduce the analog power-supply
current in standby mode, clear the DAOE0 and DAOE1
bits and disable the D/A output.
00×: D/A conversion is disabled in channels 0 and 1
010: D/A conversion is enabled in channel 0
D/A conversion is disabled in channel 1
011: D/A conversion is enabled in channels 0 and 1
100: D/A conversion is disabled in channel 0
D/A conversion is enabled in channel 1
101: D/A conversion is enabled in channels 0 and 1
11×: D/A conversion is enabled in channels 0 and 1
When the DAE bit is set to 1, even if bits DAOE0 and
DAOE1 in DACR and the ADST bit in ADCSR are
cleared to 0, the same current is drawn from the analog
power supply as during A/D and D/A conversion.
4 to —
0
All 1
R
Reserved
These bits are always read as 1. The write value should
always be 1.
Legend: ×: Don’t care
Rev. 5.00 May 29, 2006 page 551 of 698
REJ09B0146-0500