SH7706 Datasheet, PDF (78/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 2 CPU
2.4 Instruction Set
2.4.1 Instruction Set Classified by Function
The SH7706 instruction set includes 68 basic instruction types, as listed in table 2.4.
Table 2.4 Classification of Instructions
Classification Types
Data transfer 5
Arithmetic
21
operations
Operation
Code
MOV
MOVA
MOVT
SWAP
XTRCT
ADD
ADDC
ADDV
CMP/cond
DIV1
DIV0S
DIV0U
DMULS
DMULU
DT
EXTS
EXTU
MAC
Function
Data transfer
Effective address transfer
T bit transfer
Swap of upper and lower bytes
Extraction of middle of linked registers
Binary addition
Binary addition with carry
Binary addition with overflow check
Comparison
Division
Initialization of signed division
Initialization of unsigned division
Signed double-precision multiplication
Unsigned double-precision multiplication
Decrement and test
Sign extension
Zero extension
Multiply-and-accumulate operation,
double-precision multiply-and-accumulate
operation
No. of
Instructions
39
33
Rev. 5.00 May 29, 2006 page 30 of 698
REJ09B0146-0500