SH7706 Datasheet, PDF(171/749 Page) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

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SH7706 Datasheet, PDF (171/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

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Table 6.5 Interrupt Level and INTEVT Code

Interrupt level

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

INTEVT Code

H'200

H'220

H'240

H'260

H'280

H'2A0

H'2C0

H'2E0

H'300

H'320

H'340

H'360

H'380

H'3A0

H'3C0

Section 6 Interrupt Controller (INTC)

6.4 Register Description

The INTC has the following registers. Refer to section 23, List of Registers, for more details of the

addresses and access sizes.

â¢ Interrupt control register 0 (ICR0)

â¢ Interrupt control register 1 (ICR1)

â¢ Interrupt priority level setting register A (IPRA)

â¢ Interrupt priority level setting register B (IPRB)

â¢ Interrupt priority level setting register C (IPRC)

â¢ Interrupt priority level setting register D (IPRD)

â¢ Interrupt priority level setting register E (IPRE)

â¢ Interrupt request register 0 (IRR0)

â¢ Interrupt request register 1 (IRR1)

â¢ Interrupt request register 2 (IRR2)

Rev. 5.00 May 29, 2006 page 123 of 698

REJ09B0146-0500

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