SH7706 Datasheet, PDF (574/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 18 I/O Ports
18.10.2 SC Port Data Register (SCPDR)
SC Port data register (SCPDR) is a 5-bit read/write and 3-bit read register that stores data for pins
SCPT5 to SCPT0. SCP5DT to SCP0DT bit corresponds to SCPT5 to SCPT0 pin. When the pin
function is general output port, if the port is read, the value of the corresponding SCPDR bit is
returned directly. When the function is general input port, if the port is read, the corresponding pin
level is read.
SCPDR is initialized to B'***00000 by a power-on reset. After initialization, the general input
port function (pull-up MOS on) is set as the initial pin function, and the corresponding pin levels
are read from bits SCP5DT to SCP3DT and SCP1DT. SCPDR retains its previous value in
standby mode and sleep mode, and in a manual reset.
Note that the low level is read if bit 7 is read except in general-purpose input.
When reading the state of the RxD2 and RxD0 pins of the SCP2DT and SCP0DT bits in SCPDR
without clearing the TE or RE bit in SCSCR to 0, set the RE bit in SCSCR to 1. When the RE bit
is set to 1, the RxD pin is for input and the pin state can be read before the setting of SCPCR.
Bit
Bit Name Initial Value R/W
7

*
R
6

*
R
5
SCP5DT 0
R
4
SCP4DT 0
R/W
3
SCP3DT 0
R/W
2
SCP2DT 0
R/W
1
SCP1DT 0
R/W
0
SCP0DT 0
R/W
Legend: * Undefined
Description
Reserved
Table 18.10 shows the function of SCPDR
Rev. 5.00 May 29, 2006 page 526 of 698
REJ09B0146-0500