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SH7706 Datasheet, PDF (697/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series
Section 24 Electrical Characteristics
Tpcm1 Tpcm2 Tpcm1 Tpcm2 Tpcm1 Tpcm2 Tpcm1 Tpcm2
CKIO
tAD
tAD
A25 to A4
A3 to A0
CExx
RD/WR
RD
(read)
tAD
tCSD1
tRWD
tRSD
tAD
tRSD tRSD
tRDH1
tAD
tRSD
tRDH1
D15 to D0
(read)
tRDS1
tBSD
tBSD
tRDS1
tBSD
tBSD
BS
tDAKD1
DACKn
tAD
tCSD1
tRWD
tDAKD1
Note: Even though burst mode is set, write cycle operation is the same as in normal mode.
Figure 24.42 PCMCIA Memory Bus Cycle
(Burst Read, TED = 0, TEH = 0, No Wait)
Rev. 5.00 May 29, 2006 page 649 of 698
REJ09B0146-0500