SH7706 Datasheet, PDF (278/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 8 Bus State Controller (BSC)
CKIO
CKE
CSn
RASU,
RASL
CASU,
CASL
RD/WR
Tp
TRr
TRrw
TRrw
(Tpc)
Figure 8.25 Synchronous DRAM Auto-Refresh Timing
2. Self-Refreshing
Self-refresh mode is a kind of standby mode in which the refresh timing and refresh addresses
are generated within the synchronous DRAM. Self-refreshing is activated by setting both the
RMODE bit and the RFSH bit to 1. The self-refresh state is maintained while the CKE signal
is low. Synchronous DRAM cannot be accessed while in the self-refresh state. Self-refresh
mode is cleared by clearing the RMODE bit to 0. After self-refresh mode has been cleared,
command issuance is disabled for the number of cycles specified by the TPC bits in MCR.
Self-refresh timing is shown in figure 8.26. Settings must be made so that self-refresh clearing
and data retention are performed correctly, and auto-refreshing is performed at the correct
intervals. When self-refreshing is activated from the state in which auto-refreshing is set, or
when exiting standby mode other than through a power-on reset, auto-refreshing is restarted if
RFSH is set to 1 and RMODE is cleared to 0 when self-refresh mode is cleared. If the
transition from clearing of self-refresh mode to the start of auto-refreshing takes time, this time
should be taken into consideration when setting the initial value of RTCNT. Making the
RTCNT value 1 less than the RTCOR value will enable refreshing to be started immediately.
After self-refreshing has been set, the self-refresh state continues even if the chip standby state
is entered using the this LSI standby function, and is maintained even after recovery from
standby mode other than through a power-on reset. In case of a power-on reset, the bus state
controller's registers are initialized, and therefore the self-refresh state is cleared.
Self-refreshing is performed in normal operation, in sleep mode, in standby mode, and in case
of a manual reset.
Rev. 5.00 May 29, 2006 page 230 of 698
REJ09B0146-0500