SH7706 Datasheet, PDF (709/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 24 Electrical Characteristics
CK
ADTRG input
1 state
t_TRGW
ADCR
t_TRGS
Figure 24.60 External Trigger Input Timing
*1
Pφ
Address
*2
Write
signal
Input sampling
timing
ADF
t_D
t_SPL
t_CONV
Legend:
t_D : A/D conversion start delay
t_SPL : Input sampling time
t_CONV: A/D conversion time
Notes: 1. ADCSR write cycle
2. ADCSR address
Figure 24.61 A/D Conversion Timing
Rev. 5.00 May 29, 2006 page 661 of 698
REJ09B0146-0500