SH7706 Datasheet, PDF (522/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 16 Serial Communication Interface with FIFO (SCIF)
In serial transmission, the SCIF operates as described below.
1. When data is written into the SCFTDR2, the SCIF transfers the data from SCFTDR2 to the
transmit shift register (SCTSR2) and starts transmitting. Confirm that the TDFE flag in
SCSSR2 is set to 1 before writing transmit data to SCFTDR2. The number of data bytes that
can be written is (16 – transmit trigger setting).
2. When data is transferred from SCFTDR2 to SCTSR2 and transmission is started, consecutive
transmit operations are performed until there is no transmit data left in SCFTDR2. When the
number of transmit data bytes in SCFTDR2 falls below the transmit trigger number set in the
SCFCR2, the TDFE flag is set. If the TIE bit in SCSCR2 is set to 1 at this time, a transmit-
FIFO-data-empty interrupt (TXI) request is generated.
The serial transmit data is sent from the TxD2 pin in the following order.
a. Start bit: One-bit 0 is output.
b. Transmit data: 8-bit or 7-bit data is output in LSB-first order.
c. Parity bit: One parity bit (even or odd parity) is output. (A format in which a parity bit is
not output can also be selected.)
d. Stop bit(s): One- or two-bit 1s (stop bits) are output.
e. Mark state: 1 is output continuously until the start bit that starts the next transmission is
sent.
3. The SCIF checks the SCFTDR2 transmit data at the timing for sending the stop bit. If data is
present, the data is transferred from SCFTDR2 to SCTSR2, the stop bit is sent, and then serial
transmission of the next frame is started.
If there is no transmit data, the TEND flag in SCSSR2 is set to 1, the stop bit is sent, and then
the line goes to the mark state in which 1 is output continuously.
Rev. 5.00 May 29, 2006 page 474 of 698
REJ09B0146-0500