SH7706 Datasheet, PDF (479/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 15 Smart Card Interface
15.4.5 Clock
Only the internal clock generated by the on-chip baud rate generator can be used as the
communication clock in the smart card interface. The bit rate for the clock is set by the SCBRR
and the CKS1 and CKS0 bits in the SCSMR, and is calculated using the equation below. Table
15.4 shows sample bit rates. If clock output is then selected by setting CKE0 to 1, a clock with a
frequency 372 times the bit rate is output from the SCK0 pin.
B
=
1488
×
Pφ
2^2n–1 × (N
+
1)
× 10⁶
Where: N = Value set in SCBRR (0 ≤ N ≤ 255)
B = Bit rate (bit/s)
Pφ = Peripheral module operating frequency (MHz)
n = 0 to 3 (table 15.3)
Table 15.3 Relationship of n to CKS1 and CKS0
n
CKS1
0
0
1
0
2
1
3
1
CKS0
0
1
0
1
Table 15.4 Examples of Bit Rate B (Bit/s) for SCBRR Settings (n = 0)
Pφ (MHz)
N
7.1424 10.00
10.7136 13.00
14.2848
0
9600.0 13440.9 14400.0 17473.1 19200.0
1
4800.0 6720.4 7200.0 8736.6 9600.0
2
3200.0 4480.3 4800.0 5824.4 6400.0
Note: The bit rate is rounded to two decimal places.
16.00
21505.4
10752.7
7168.5
18.00
24193.5
12096.8
8064.5
Calculate the value to be set in the bit rate register (SCBRR) from the operating frequency and the
bit rate. N is an integer in the range 0 ≤ N ≤ 255, specifying a smallish error.
N
=
1488
Pφ
× 2^2n–1
×
B
×
10⁶
–
1
Rev. 5.00 May 29, 2006 page 431 of 698
REJ09B0146-0500