SH7706 Datasheet, PDF (360/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 10 Clock Pulse Generator (CPG)
10.5 Operation
The frequency of the CPU clock and peripheral clock can be changed either by changing the
multiplication rate of PLL circuit 1 or by changing the division rates of dividers 1 and 2. All of
these are controlled by software through the frequency control register. The methods are described
below.
10.5.1 Changing the Multiplication Rate
A PLL settling time is required when the multiplication rate of PLL circuit 1 is changed. The on-
chip WDT counts the settling time. Refer to section 11, Watchdog Timer (WDT), for more details.
1. In the initial state, the multiplication rate of PLL circuit 1 is 1.
2. Set a value that will become the specified oscillation settling time in the WDT and stop the
WDT. The following must be set:
WTCSR register TME bit = 0: WDT stops
WTCSR register CKS2 to CKS0 bits: Division ratio of WDT count clock
WTCNT counter: Initial counter value
3. Set the desired value in the STC2, STC1 and STC0 bits. The division ratio can also be set in
the IFC2 to IFC0 bits and PFC2 to PFC0 bits.
4. The processor pauses internally and the WDT starts incrementing. At this time, the CPU (Iφ)
and peripheral clocks (Pφ) both stop, and the clock is continuously output to the CKIO pin in
clock modes 0 to 2.
5. Supply of the clock that has been set begins at WDT count overflow, and the processor begins
operating again. The WDT stops after it overflows.
10.5.2 Changing the Division Ratio
The WDT will not count unless the multiplication rate is changed simultaneously.
1. In the initial state, IFC2 to IFC0 = 000 and PFC2 to PFC0 = 010.
2. Set the IFC2, IFC1, IFC0, PFC2, PFC1, and PFC0 bits to the new division ratio. The values
that can be set are limited by the clock mode and the multiplication rate of PLL circuit 1. Note
that if the wrong value is set, the processor will malfunction.
3. The clock is immediately supplied at the new division ratio.
Rev. 5.00 May 29, 2006 page 312 of 698
REJ09B0146-0500