SH7706 Datasheet, PDF (717/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

B. Pin Functions
Appendix
B.1 Pin Functions
Table B.1 shows pin states during resets, power-down states, and the bus-released states.
Table B.1 Pin States during Resets, Power-Down States, and Bus-Released State
Category
Clock
System
control
Interrupt
Address bus
Data bus
Reset
Power-On Manual
Pin
Reset
Reset
EXTAL
XTAL
CKIO
I
O^*1
IO^*1
I
O^*1
IO^*1
EXTAL2
I
I
XTAL2
O
O
CAP1, CAP2
—
—
RESETP
I
I
RESETM
I
I
BREQ
I
I
BACK
O
O
MD[5:0]
I
I
CA
I
STATUS[1:0]/PTE[5:4] O
IRQ[3:0]/IRL[3:0]/
I^*8
PTH[3:0]
IRQ4/ PTH[4]
I^*8
I
OP^*3
I
I
NMI
I
IRQOUT/PTE[7]
H
I
OP^*3
A[25:0]
Z
O
D[15:0]
Z
I
D[23:16]/PTA[7:0]
Z
IP^*3
D[31:24]/PTB[7:0]
Z
IP^*3
Power-Down
Standby Sleep
I
O^*1
IO^{*1 *12}
I
O^*1
IO^*1
I
I
O
O
—
—
I
I
I
I
I
I
O
O
I
I
I
OP^*3
I
OP^*3
I
I
I
I
ZK^*3
ZL^*10
Z
ZK^*3
ZK^*3
I
I
OP^*3
O
IO
IOP^*3
IOP^*3
Bus
Released
I
O^*1
IO^*1
I
O
—
I
I
L
I
OP^*3
I
I
I
OP^*3
Z
Z
ZP^*3
ZP^*3
Rev. 5.00 May 29, 2006 page 669 of 698
REJ09B0146-0500