SH7706 Datasheet, PDF (617/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 22 Power-Down Modes
22.1 Input/Output Pin
Table 22.2 lists the pins used for the power-down modes.
Table 22.2 Pin Configuration
Pin Name
Symbol I/O Description
Processing state 1 STATUS1 O Operating state of the processor.
Processing state 0 STATUS0
STATUS1
STATUS0
state
High-level
High-level
Reset
High-level
Low-level
Sleep mode
Low-level
High-level
Standby mode
Low-level
Low-level
Normal operation
22.2 Register Description
These are two control registers for the power-down modes. Refer to section 23, List of Registers,
for more details of the addresses and access sizes.
• Standby control register (STBCR)
• Standby control register 2 (STBCR2)
22.2.1 Standby Control Register (STBCR)
The standby control register (STBCR) is an 8-bit read/write register that sets the power-down
mode.
Bit
Bit Name Initial Value R/W Description
7
STBY
0
R/W Software Standby
Specifies transition to software standby mode.
0: Executing SLEEP instruction puts the chip into
sleep mode.
1: Executing SLEEP instruction puts the chip into
software standby mode.
6, 5
—
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
Rev. 5.00 May 29, 2006 page 569 of 698
REJ09B0146-0500