SH7706 Datasheet, PDF (308/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 9 Direct Memory Access Controller (DMAC)
Bit Bit Name Initial Value R/W
11
RS3
0
R/W
10
RS2
0
R/W
9
RS1
0
R/W
8
RS0
0
R/W
Description
Resource Select
RS3 to RS0 specify which transfer requests will
be sent to the DMAC.
0000: External request, dual address mode
0001: Reserved (Setting prohibited)
0010: External request / Single address mode
External address space → external device
with DACK
0011: External request / Single address mode
External device with DACK → external
address space
0100: Auto request
0101: Reserved (Setting prohibited)
0110: Reserved (Setting prohibited)
0111: Reserved (Setting prohibited)
1000: Reserved (Setting prohibited)
1001: Reserved (Setting prohibited)
1010: Reserved (Setting prohibited)
1011: Reserved (Setting prohibited)
1100: SCIF transmission
1101: SCIF reception
1110: Internal A/D
1111: CMT
Notes: 1. External request specification is valid
only in channels 0 and 1. None of the
request sources can be selected in
channels 2 and 3.
2. When using 16-byte transfer, the
following settings must not be made:
1100 SCIF transmission
1101 SCIF reception
1110 A/D converter
1111 CMT
Operation is not guaranteed if these
settings are made.
Rev. 5.00 May 29, 2006 page 260 of 698
REJ09B0146-0500