SH7706 Datasheet, PDF (596/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 19 A/D Converter (ADC)
19.9.3 Access Size and Read Data
Table 19.5 shows the relationship between access size and read data. Note the read data obtained
with different access sizes, bus widths, and endian modes.
The case is shown here in which H'3FF is obtained when AV_CC is input as an analog input. FF is
the data containing the upper 8 bits of the conversion result, and C0 is the data containing the
lower 2 bits.
Table 19.5 Relationship between Access Size and Read Data
Access
Bus Width 32 Bits (D31 to D0) 16 Bits (D15 to D0) 8 Bits (D7 to D0)
Size
Command Endian
Big
Little
Big
Little
Big
Little
Byte
MOV.L #ADDRAH,R9
access MOV.B @R9,R8
FFFFFFFF FFFFFFFF FFFF
FFFF
FF
FF
MOV.L #ADDRAL,R9
MOV.B @R9,R8
C0C0C0C0 C0C0C0C0 C0C0
C0C0
C0
C0
Word
access
MOV.L
MOV.W
MOV.L
MOV.W
#ADDRAH,R9
@R9,R8
FFxxFFxx
#ADDRAL,R9
@R9,R8
C0xxC0xx
FFxxFFxx
C0xxC0xx
FFxx
C0xx
FFxx
C0xx
FFxx
C0xx
xxFF
xxC0
Longword MOV.L
access MOV.L
#ADDRAH,R9
@R9,R8
FFxxC0xx FFxxC0xx FFxxC0xx C0xxFFxx FFxxC0xx xxC0xxFF
Note: #ADDRAH .EQU H'A4000080
#ADDRAL .EQU H'A4000082
Values are shown in hexadecimal for the case where read data is output to an external
device via R8.
Rev. 5.00 May 29, 2006 page 548 of 698
REJ09B0146-0500