SH7706 Datasheet, PDF (521/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 16 Serial Communication Interface with FIFO (SCIF)
Serial data transmission: Figure 16.6 shows a sample flowchart for serial transmission.
Use the following procedure for serial data transmission after enabling the SCIF for transmission.
Start transmission
Read TDFE bit in SCSSR2
No
TDFE= 1?
Yes
Write transmit data (16 - transmit
trigger set number) to SCFTDR2,
read 1 from TDFE bit and TEND flag
in SCSSR2, then clear to 0
No
All data transmitted?
Yes
Read TEND bit in SCSSR2
No
TEND= 1?
Yes
No
Break output?
Yes
Set SCPDR and SCPCR
Clear TE bit in SCSCR2 to 0
1. SCIF status check and transmit data write:
Read SCSSR2 and check that the TDFE
flag is set to 1, then write transmit data to
the SCFTDR2, read 1 from the TDFE and
TEND flags, then clear these flags to 0.
The number of transmit data bytes that can
be written is 16 - (transmit trigger set
number).
2. Serial transmission continuation procedure:
To continue serial transmission, read 1 from
the TDFE flag to confirm that writing is
possible, then write data to SCFTDR2, and
then clear the TDFE flag to 0.
3. Break output at the end of serial
transmission: To output a break in serial
transmission, set the SCPDR and SCPCR,
then clear the TE bit to 0 in the SCSCR2.
For information on SCPDR and SCPCR,
see 16.3.11, SC Port Control Register
(SCPCR), and 16.3.12, SC Port Data
Register (SCPDR).
In steps 1 and 2, it is possible to ascertain
the number of data bytes that can be
written from the number of transmit data
bytes in SCFTDR2 indicated by the upper 8
bits of the SCFDR2.
End of transmission
Figure 16.6 Sample Serial Transmission Flowchart
Rev. 5.00 May 29, 2006 page 473 of 698
REJ09B0146-0500