SH7706 Datasheet, PDF (37/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

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Example of PCMCIA Interface............................................................................ 238
Basic Timing for PCMCIA Memory Card Interface ........................................... 239
Wait Timing for PCMCIA Memory Card Interface............................................. 240
Basic Timing for PCMCIA Memory Card Interface Burst Access...................... 241
Wait Timing for PCMCIA Memory Card Interface Burst Access....................... 242
Basic Timing for PCMCIA I/O Card Interface.................................................... 244
Wait Timing for PCMCIA I/O Card Interface ..................................................... 245
Dynamic Bus Sizing Timing for PCMCIA I/O Card Interface............................ 246
Waits between Access Cycles.............................................................................. 248
Pins A25 to A0 Pull-Up Timing .......................................................................... 249
Pins D31 to D0 Pull-Up Timing (Read Cycle) .................................................... 250
Pins D31 to D0 Pull-Up Timing (Write Cycle).................................................... 250
Section 9 Direct Memory Access Controller (DMAC)
Figure 9.1 DMAC Block Diagram ........................................................................................ 253
Figure 9.2 DMAC Transfer Flowchart.................................................................................. 266
Figure 9.3 Round-Robin Mode ............................................................................................. 270
Figure 9.4 Changes in Channel Priority in Round-Robin Mode ........................................... 271
Figure 9.5 Operation in the Direct Address Mode in the Dual Address Mode ..................... 273
Figure 9.6 Example of DMA Transfer Timing in the Direct Address Mode in the Dual
Address Mode (Transfer Source: Ordinary Memory, Transfer Destination: Ordinary
Memory) .............................................................................................................. 274
Figure 9.7 Example of DMA Transfer Timing in the Direct Address Mode in the Dual
Address Mode (16-Byte Transfer, Transfer Source: Ordinary Memory,
Transfer Destination: Ordinary Memory) ............................................................ 275
Figure 9.8 Example of DMA Transfer Timing in the Direct Address Mode in the Dual
Address Mode (16-Byte Transfer, Transfer Source: Synchronous DRAM,
Transfer Destination: Ordinary Memory) ............................................................ 275
Figure 9.9 Operation in the Indirect Address mode in the Dual Address Mode
(When the External Memory Space Has a 16-Bit Width).................................... 277
Figure 9.10 Example of Transfer Timing in the Indirect Address Mode
in the Dual Address Mode ................................................................................... 278
Figure 9.11 Data Flow in the Single Address Mode ............................................................... 279
Figure 9.12 Example of DMA Transfer Timing in the Single Address Mode ........................ 280
Figure 9.13 Example of DMA Transfer Timing in the Single Address Mode
(16-Byte Transfer, External Memory Space (Ordinary Memory) → External
Device with DACK) ............................................................................................ 281
Figure 9.14 DMA Transfer Example in the Cycle-Steal Mode............................................... 282
Figure 9.15 DMA Transfer Example in the Burst Mode......................................................... 282
Figure 9.16 Bus State when Multiple Channels Are Operating
(Priority Level Is Round-Robin Mode)................................................................ 284
Rev. 5.00 May 29, 2006 page xxxvii of xlviii