SH7706 Datasheet, PDF (681/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 24 Electrical Characteristics
Tr Trw Tc1 Tc2 Tc3 Tc4/Td1 Td2 Td3 Td4 (Tpc)
CKIO
t_AD
A25 to A16
Row address
t_AD
t_AD
t_AD
t_AD t_AD
A12 or A11
Row
address
Read command
t_AD t_AD
t_AD
A15 to A0
Row
address
t_CSD3
Column address (1-4)
CSn
t_RWD
RD/WR
RAS
t_RASD
t_RASD
t_CASD
t_CASD
t_AD
t_CSD3
t_RWD
CAS
DQMxx
t_DQMD
D31 to D0
(read)
BS
t_RDS2 t_RDH2
t_BSD
t_DQMD
t_RDS2 t_RDH2
t_BSD
CKE
DACKn
t_DAKD1
(High)
t_DAKD1
Figure 24.25 Synchronous DRAM Read Bus Cycle
(Burst Read (Single Read × 4), RCD = 1, CAS Latency = 3, TPC = 0)
Rev. 5.00 May 29, 2006 page 633 of 698
REJ09B0146-0500