SH7706 Datasheet, PDF (475/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

15.4 Operation
Section 15 Smart Card Interface
15.4.1 Overview
The primary functions of the smart card interface are described below.
1. Each frame consists of 8-bit data and a parity bit.
2. During transmission, the card leaves a guard time of at least 2 etu (elementary time units: the
period for 1 bit to transfer) from the end of the parity bit to the start of the next frame.
3. During reception, the card outputs an error signal low level for 1 etu after 10.5 etu has elapsed
from the start bit if a parity error was detected.
4. During transmission, it automatically transmits the same data after allowing at least 2 etu from
the time the error signal is sampled.
5. Only start-stop type asynchronous communication functions are supported; no synchronous
communication functions are available.
15.4.2 Pin Connections
Figure 15.2 shows the pin connection diagram for the smart card interface. During communication
with an IC card, transmission and reception are both carried out over the same data transfer line,
so connect the TxDφ and RxDφ pins on the chip. Pull up the data transfer line to the power supply
V_CC side with a resistor.
When using the clock generated by the smart card interface on an IC card, input the SCKφ pin
output to the IC card's CLK pin. This connection is not necessary when the internal clock is used
on the IC card.
Use the chip's port output as the reset signal. Apart from these pins, the power and ground pin
connections are usually also required.
Note: When the IC card is not connected and both RE and TE are set to 1, closed communication
is possible and self-diagnosis can be performed.
Rev. 5.00 May 29, 2006 page 427 of 698
REJ09B0146-0500