SH7706 Datasheet, PDF (654/749 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7700 Series

Section 23 List of Registers
Register
Name
Power-on Manual
Reset
Reset
Hardware Software
Standby Standby
Module
Standby
Sleep
PGCR
Initialized Held
Held
Held
Held
Held
PHCR
Initialized Held
Held
Held
Held
Held
PJCR
Initialized Held
Held
Held
Held
Held
SCPCR
Initialized Held
Held
Held
Held
Held
PADR
Initialized Held
Held
Held
Held
Held
PBDR
Initialized Held
Held
Held
Held
Held
PCDR
Initialized Held
Held
Held
Held
Held
PDDR
Initialized Held
Held
Held
Held
Held
PEDR
Initialized Held
Held
Held
Held
Held
PFDR
Initialized Held
Held
Held
Held
Held
PGDR
Initialized Held
Held
Held
Held
Held
PHDR
Initialized Held
Held
Held
Held
Held
PJDR
Initialized Held
Held
Held
Held
Held
SCPDR
Initialized Held
Held
Held
Held
Held
SCSMR2
Initialized Initialized Initialized Initialized Initialized Held
SCBRR2
Initialized Initialized Initialized Initialized Initialized Held
SCSCR2
Initialized Initialized Initialized Initialized Initialized Held
SCFTDR2 Undefined Undefined Undefined Undefined Undefined Held
SCSSR2
Initialized Initialized Initialized Initialized Initialized Held
SCFRDR2 Undefined Undefined Undefined Undefined Undefined Held
SCFCR2
Initialized Initialized Initialized Initialized Initialized Held
SCFDR2
SDIR^*4
Initialized
Held
Initialized
Held
Initialized
Held
Initialized
Held
Initialized
Held
Held
Held
Notes: 1. Some bits are not initialized.
2. These bits are not initialized at a power-on reset by the WDT.
3. Some bits are initialized.
4. Initialized on asserting state of TRST or on Test-Logic-Reset state of TAP.
Module
PORT
SCIF
UDI
Rev. 5.00 May 29, 2006 page 606 of 698
REJ09B0146-0500