SH7080_09 Datasheet, PDF (942/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 17 Synchronous Serial Communication Unit (SSU)
Start setting initial values
Clear TE and RE bits in SSER to 0
[1] Set PFC for external pins to be used
(SSCK, SSI, SSO, and SCS)
[2]
Specify MSS, BIDE, SOL, CSS1,
and CSS0 bits in SSCRH
[3]
Clear SSUMS in SSCRH to 0 and
specify bits DATS1 and DATS0
[4]
Specify bits MLS, CPOS, CPHS, CKS2,
CKS1, and CKS0 in SSMR
[1] Make appropriate settings in the PFC for the external pins to be used.
[2] Specify master/slave mode selection, bidirectional mode enable,
SSO pin output value selection, SSCK pin selection, and SCS pin
selection.
[3] Selects SSU mode and specify transmit/receive data length.
[4] Specify MSB first/LSB first selection, clock polarity selection,
clock phase selection, and transfer clock rate selection.
[5] Specify timing of TEND bit setting, SCS pin assertion, and data
output on the SSO pin.
[6] Enables/disables interrupt requests to the CPU.
[5]
Specify bits TENDSTS, SCSATS,
and SSODTS in SSCR2
[6]
Specify bits TE, RE, TEIE, TIE, RIE,
and CEIE in SSER simultaneously
End
Figure 17.4 Example of Initial Settings in SSU Mode
Rev. 4.00 Dec. 15, 2009 Page 882 of 1558
REJ09B0181-0400