SH7080_09 Datasheet, PDF (810/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 15 Serial Communication Interface (SCI)
Table 15.9 Bit Rates and SCBRR Settings in Clock Synchronous Mode (3)
Pφ (MHz)
Bit Rate
34
36
38
(bits/s)
n
N
n
N
n
N
n
250
500
1000
3
132
3
140
3
147
3
2500
2
212
2
224
2
237
2
5000
2
105
2
112
2
118
2
10000
1
212
1
224
1
237
1
25000
1
84
1
89
1
94
1
50000
0
169
0
179
0
189
0
100000
0
84
0
89
0
94
0
250000
0
33
0
35
0
37
0
500000
0
16
0
17
0
18
0
1000000 ⎯
⎯
0
8
⎯
⎯
0
2500000 ⎯
⎯
⎯
⎯
⎯
⎯
0
5000000 ⎯
⎯
⎯
⎯
⎯
⎯
0
[Legend]
Blank: No setting possible
⎯: Setting possible, but error occurs
*:
Continuous transmission/reception is disabled.
Note: Settings with an error of 1% or less are recommended.
40
N
155
249
124
249
99
199
99
39
19
9
3
1
Rev. 4.00 Dec. 15, 2009 Page 750 of 1558
REJ09B0181-0400