SH7080_09 Datasheet, PDF (1194/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 21 Pin Function Controller (PFC)
Initial
Bit
Bit Name Value R/W Description
2
PE12MD2 0
R/W PE12 Mode
1
PE12MD1 0
R/W Select the function of the PE12/TIOC4A/TXD3/SCS
0
PE12MD0 0
R/W ^pin.
000: PE12 I/O (port)
001: TIOC4A I/O (MTU2)
011: TXD3 output (SCIF)
101: SCS I/O (SSU)
Other than above: Setting prohibited
Note: * This function is enabled only in the on-chip ROM enabled/disabled external-extension
mode. Do not set 1 in single-chip mode.
• Port E Control Register L3 (PECRL3)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
PE11 PE11 PE11
MD2 MD1 MD0
-
PE10 PE10 PE10
MD2 MD1 MD0
-
PE9 PE9 PE9
MD2 MD1 MD0
-
PE8 PE8 PE8
MD2 MD1 MD0
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W
Initial
Bit
Bit Name Value R/W Description
15
⎯
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
14
PE11MD2 0
13
PE11MD1 0
12
PE11MD0 0
R/W PE11 Mode
R/W Select the function of the PE11/TIOC3D/RXD3/CTS3
R/W ^pin.
000: PE11 I/O (port)
001: TIOC3D I/O (MTU2)
011: RXD3 input (SCIF)
100: CTS3 input (SCIF)
Other than above: Setting prohibited
11
⎯
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
Rev. 4.00 Dec. 15, 2009 Page 1134 of 1558
REJ09B0181-0400