SH7080_09 Datasheet, PDF (1028/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 19 A/D Converter (ADC)
19.5 Interrupt Sources and DMAC and DTC Transfer Requests
The A/D converter can generate an A/D conversion end interrupt request (ADI). The ADI
interrupt can be enabled by setting the ADIE bit in the A/D control/status register (ADCSR) to 1,
or disabled by clearing the ADIE bit to 0.
The DTC or DMAC can be activated by an ADI interrupt. In this case an interrupt request is not
sent to the CPU.
When the DTC or DMAC is activated by an ADI interrupt, the ADF bit in ADCSR is
automatically cleared when data is transferred by the DTC or DMAC. Having the converted data
read by the DTC or DMAC in response to an ADI interrupt enables continuous conversion to be
achieved without imposing a load on software.
Table 19.6 A/D Converter Interrupt Source
Name
ADI0
ADI1
ADI2
Interrupt Source
A/D_0 conversion completed
A/D_1 conversion completed
A/D_2 conversion completed
DTC
Interrupt Source Flag Activation
ADF in ADCSR_0
Possible
ADF in ADCSR_1
Possible
ADF in ADCSR_2
Possible
DMAC
Activation
Impossible
Possible
Impossible
Rev. 4.00 Dec. 15, 2009 Page 968 of 1558
REJ09B0181-0400