SH7080_09 Datasheet, PDF (857/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 16 Serial Communication Interface with FIFO (SCIF)
Initial
Bit
Bit Name value R/W Description
2
⎯
0
R Reserved
This bit is always read as 0. The write value should
always be 0.
1, 0
CKS[1:0] 00
R/W Clock Select 1 and 0
Select the internal clock source of the on-chip baud rate
generator. Four clock sources are available. Pφ, Pφ/4,
Pφ/16 and Pφ/64. For further information on the clock
source, bit rate register settings, and baud rate, see
section 16.3.8, Bit Rate Register (SCBRR).
00: Pφ
01: Pφ/4
10: Pφ/16
11: Pφ/64
Note: Pφ: Peripheral clock
16.3.6 Serial Control Register (SCSCR)
SCSCR is a 16-bit register that operates the SCIF transmitter/receiver, enables/disables interrupt
requests, and selects the transmit/receive clock source. The CPU can always read and write to
SCSCR.
Bit: 15 14 13 12 11 10 9
-
-
-
-
-
-
-
Initial value: 0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
8
7
6
5
4
3
2
1
0
-
TIE RIE TE RE REIE -
CKE[1:0]
0
0
0
0
0
0
0
0
0
R R/W R/W R/W R/W R/W R R/W R/W
Rev. 4.00 Dec. 15, 2009 Page 797 of 1558
REJ09B0181-0400