SH7080_09 Datasheet, PDF (819/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 15 Serial Communication Interface (SCI)
Start initialization
Clear RIE, TIE, TEIE, MPIE,
TE, and RE bits in SCSCR to 0*
Set CKE1 and CKE0 bits in SCSCR
(TE and RE bits are 0)
[1]
Set data transfer format in
SCSMR, SCSDCR
[2]
Set value in SCBRR
[3]
Wait
No
1-bit interval elapsed?
Yes
Set the PFC for the external pins to be _[4]
used (SCK, TXD, RXD)
Set TE and RE bits of SCSCR to 1
Set the RIE, TIE, TEIE, and MPIE bits ^[5]
in SCSCR
[1] Set the clock selection in SCSCR.
[2] Set the data transfer format in SCSMR
and SCSDCR.
[3] Write a value corresponding to the bit
rate to SCBRR. Not necessary if an
external clock is used.
[4] Set PFC of the external pin used. Set
RXD input during receiving and TXD
output during transmitting. Set SCK
input/output according to contents set by
CKE1 and CKE0. When CKE1 and
CKE0 are 0 in asynchronous mode,
setting the SCK pin is unnecessary.
Outputting clocks from the SCK pin
starts at synchronous clock output
setting.
[5] Set the TE bit or RE bit in SCSCR to 1.*
Also make settings of the RIE, TIE,
TEIE, and MPIE bits. At this time, the
TXD, RXD, and SCK pins are ready to
be used. The TXD pin is in a mark state
during transmitting, and RXD pin is in an
idle state for waiting the start bit during
receiving.
< Initialization completed>
Note : * In simultaneous transmit/receive operation, the TE and RE bits must be cleared to 0 or set to 1
simultaneously.
Figure 15.3 Sample Flowchart for SCI Initialization
Rev. 4.00 Dec. 15, 2009 Page 759 of 1558
REJ09B0181-0400