SH7080_09 Datasheet, PDF (1320/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 23 Flash Memory
• After the selection condition of the download program and the address set in FTDAR
are checked, the transfer processing is executed starting to the on-chip RAM address
specified by FTDAR.
• The SCO bits in FCCS, FPCS, and FECS are cleared to 0.
• The return value is set to the DPFR parameter.
• After the on-chip program storage area is returned to the user MAT space, execution
returns to the user procedure program.
After download is completed and the user procedure program is running, the VBR setting can
be changed.
The notes on download are as follows.
In the download processing, the values of the general registers of the CPU are retained.
During the download processing, interrupts must not be generated. For details on the
relationship between download and interrupts, see section 23.8.2, Interrupts during
Programming/Erasing.
Since a stack area of maximum 128 bytes is used, an area of at least 128 bytes must be saved
before setting the SCO bit to 1.
If flash memory is accessed by the DMAC or DTC during downloading, operation cannot be
guaranteed. Therefore, access by the DMAC or DTC must not be executed.
(2.4) FKEY is cleared to H'00 for protection.
(2.5) The value of the DPFR parameter must be checked to confirm the download result.
A recommended procedure for confirming the download result is shown below.
• Check the value of the DPFR parameter (one byte of start address of the download
destination specified by FTDAR). If the value is H'00, download has been performed
normally. If the value is not H'00, the source that caused download to fail can be
investigated by the description below.
• If the value of the DPFR parameter is the same as before downloading (e.g. H'FF), the
address setting of the download destination in FTDAR may be abnormal. In this case,
confirm the setting of the TDER bit (bit 7) in FTDAR.
• If the value of the DPFR parameter is different from before downloading, check the SS
bit (bit 2) and the FK bit (bit 1) in the DPFR parameter to ensure that the download
program selection and FKEY register setting were normal, respectively.
(2.6) The operating frequency is set to the FPEFEQ parameter and the user branch destination is
set to the FUBRA parameter for initialization.
Rev. 4.00 Dec. 15, 2009 Page 1260 of 1558
REJ09B0181-0400