SH7080_09 Datasheet, PDF (828/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 15 Serial Communication Interface (SCI)
Figure 15.9 shows a sample flowchart for initializing the SCI.
Start initialization
Clear RIE, TIE, TEIE, MPIE,
TE and RE bits in SCSCR to 0*
Set CKE1 and CKE0 bits in SCSCR [1]
(TE and RE bits are 0)
Set data transfer format in
[2]
SCSMR
Set value in SCBRR
[3]
Wait
No
1-bit interval elapsed?
Yes
Set the PFC for the external pins to be
used (SCK, TXD, RXD)
[4]
Set TE and RE bits of SCSCR to 1
Set the RIE, TIE, TEIE, and MPIE bits
[5]
in SCSCR
[1] Set the clock selection in SCSCR.
[2] Set the data transfer format in SCSMR.
[3] Write a value corresponding to the bit rate to
SCBRR. Not necessary if an external clock is
used.
[4] Set PFC of the external pin used. Set RXD
input during receiving and TXD output during
transmitting. Set SCK input/output according
to contents set by CKE1 and CKE0.
[5] Set the TE bit or RE bit in SCR to 1.* Also
make settings of the RIE, TIE, TEIE, and
MPIE bits. At this time, the TXD, RXD, and
SCK pins are ready to be used. The TXD pin
is in a mark state during transmitting. When
synchronous clock output (clock master) is
set during receiving in clock synchronous
mode, outputting clocks from the SCK pin
starts.
<Transfer starts>
Note: * In simultaneous transmit and receive operations, the TE and RE bits should both be cleared to
0 or set to 1 simultaneously.
Figure 15.9 Sample Flowchart for SCI Initialization
Rev. 4.00 Dec. 15, 2009 Page 768 of 1558
REJ09B0181-0400