SH7080_09 Datasheet, PDF (745/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 13 Port Output Enable (POE)
Initial
Bit Bit Name value R/W Description
14
POE2F
0
R/(W)*¹ POE2 Flag
This flag indicates that a high impedance request has
been input to the POE2 pin.
[Clearing conditions]
• By writing 0 to POE2F after reading POE2F = 1
(when the falling edge is selected by bits 5 and 4 in
ICSR1)
• By writing 0 to POE2F after reading POE2F = 1 after
a high level input to POE2 is sampled at Pφ/8, Pφ/16,
or Pφ/128 clock (when low-level sampling is selected
by bits 5 and 4 in ICSR1)
[Setting condition]
13
POE1F
0
• When the input set by ICSR1 bits 5 and 4 occurs at
the POE2 pin
R/(W)*¹ POE1 Flag
This flag indicates that a high impedance request has
been input to the POE1 pin.
[Clearing conditions]
• By writing 0 to POE1F after reading POE1F = 1
(when the falling edge is selected by bits 3 and 2 in
ICSR1)
• By writing 0 to POE1F after reading POE1F = 1 after
a high level input to POE1 is sampled at Pφ/8, Pφ/16,
or Pφ/128 clock (when low-level sampling is selected
by bits 3 and 2 in ICSR1)
[Setting condition]
• When the input set by ICSR1 bits 3 and 2 occurs at
the POE1 pin
Rev. 4.00 Dec. 15, 2009 Page 685 of 1558
REJ09B0181-0400