SH7080_09 Datasheet, PDF (1006/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 19 A/D Converter (ADC)
Figure 19.1 shows a block diagram of the A/D converter.
Module data bus
Internal data bus
AV_CC
AV_ref
AV_SS
10-bit D/A
ANm
•
•
•
•
•
•
ANn
+
Comparator
Sample-and-
hold circuit
Control circuit
Pφ
Pφ/2
Pφ/3
Pφ/4
ADI
interrupt signal
Conversion start
trigger from MTU2/MTU2S
ADTRG
[Legend]
ADCR:
A/D control register
ADCSR:
A/D control/status register
ADTSR:
A/D trigger select register
ADDRm to ADDRn: A/D data registers m to n
Note: The register number corresponds to the channel number of the module.
(m to n = 0 to 7 in SH7083/SH7084/SH7085
m to n = 0 to 15 in SH7086)
Figure 19.1 Block Diagram of A/D Converter (for One Module)
Rev. 4.00 Dec. 15, 2009 Page 946 of 1558
REJ09B0181-0400