SH7080_09 Datasheet, PDF (1298/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 23 Flash Memory
(2) Programming/Erasing Initialization
The on-chip programming/erasing program to be downloaded includes the initialization
program.
The specified period pulse must be applied when programming or erasing. The specified pulse
width is made by the method in which wait loop is configured by the CPU instruction. The
operating frequency of the CPU must be set. Since the user branch function is supported, the
user branch destination address must be set.
The initial program is set as a parameter of the programming/erasing program which has
downloaded these settings.
(2.1) Flash programming/erasing frequency parameter (FPEFEQ: general register R4 of CPU)
This parameter sets the operating frequency of the CPU.
For the range of the operating frequency of this LSI, see section 28.3.1, Clock Timing.
Bit: 31
-
Initial value: -
R/W: R/W
30
-
-
R/W
29
-
-
R/W
28
-
-
R/W
27
-
-
R/W
26
-
-
R/W
25
-
-
R/W
24
-
-
R/W
23
-
-
R/W
22
-
-
R/W
21
-
-
R/W
20
-
-
R/W
19
-
-
R/W
18
-
-
R/W
17
-
-
R/W
16
-
-
R/W
Bit: 15
F15
Initial value: -
R/W: R/W
14
F14
-
R/W
13
F13
-
R/W
12
F12
-
R/W
11
F11
-
R/W
10
F10
-
R/W
9
F9
-
R/W
8
F8
-
R/W
7
F7
-
R/W
6
F6
-
R/W
5
F5
-
R/W
4
F4
-
R/W
3
F3
-
R/W
2
F2
-
R/W
1
F1
-
R/W
0
F0
-
R/W
Rev. 4.00 Dec. 15, 2009 Page 1238 of 1558
REJ09B0181-0400