SH7080_09 Datasheet, PDF (1177/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 21 Pin Function Controller (PFC)
• Port D Control Register H1 (PDCRH1)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
PD19 PD19 PD19
MD2 MD1 MD0
-
PD18 PD18 PD18
MD2 MD1 MD0
-
PD17 PD17 PD17
MD2 MD1 MD0
-
PD16 PD16 PD16
MD2 MD1 MD0
Initial value: 0
0
0 0* 0
0
0 0* 0
0
0 0* 0
0
0 0*
R/W: R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W
Note: * The initial value is 1 in the on-chip ROM disabled 32-bit external-extension mode.
Initial
Bit
Bit Name Value R/W Description
15
⎯
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
14
PD19MD2 0
R/W PD19 Mode
13
PD19MD1 0
R/W Select the function of the
12
PD19MD0 0*¹
R/W ^{PD19/D19/IRQ3/POE7/AUDATA3 pin. Fixed to}
AUDATA3 output when using the AUD function of the
E10A.
000: PD19 I/O (port)
001: D19 I/O (BSC)*²
010: IRQ3 input (INTC)
100: POE7 input (POE)
Other than above: Setting prohibited
11
⎯
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
10
PD18MD2 0
R/W PD18 Mode
9
PD18MD1 0
R/W Select the function of the
8
PD18MD0 0*¹
R/W ^{PD18/D18/IRQ2/POE6/AUDATA2 pin. Fixed to}
AUDATA2 output when using the AUD function of the
E10A.
000: PD18 I/O (port)
001: D18 I/O (BSC)*²
010: IRQ2 input (INTC)
100: POE6 input (POE)
Other than above: Setting prohibited
Rev. 4.00 Dec. 15, 2009 Page 1117 of 1558
REJ09B0181-0400