SH7080_09 Datasheet, PDF (286/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 9 Bus State Controller (BSC)
Address
Area
Memory Type
Capacity
Bus
Width
H'1C000000 to CS7 space
H'1DFFFFFF
Normal space
SRAM with byte selection
32 Mbytes
8 or 16
bits*²
H'1E000000 to Reserved
H'FFF7FFFF
H'FFF80000 to SDRAM mode setting
H'FFF9FFFF space
H'FFFA0000 to Reserved
H'FFFF3FFF
H'FFFF4000 to On-chip RAM
H'FFFFBFFF
32 Kbytes 32 bits
H'FFFFC000 to On-chip peripheral
H'FFFFFFFF modules
16 Kbytes
8 or 16
bits
Notes: Do not access the reserved area. If the reserved area is accessed, the correct operation
cannot be guaranteed.
1. The bus width is selected by the mode pins.
2. The bus width is selected by the register setting.
Table 9.6 Address Map: SH7084 (256-Kbyte Flash Memory Version) in On-Chip ROM-
Enabled Mode
Address
H'00000000 to
H'0003FFFF
H'00040000 to
H'01FFFFFF
H'02000000 to
H'03FFFFFF
Area
On-chip ROM
Reserved
CS0 space
H'04000000 to CS1 space
H'07FFFFFF
H'08000000 to CS2 space
H'0BFFFFFF
Memory Type
Capacity
256 Kbytes
Bus
Width
32 bits
Normal space
SRAM with byte selection
Burst ROM (asynchronous)
Burst ROM (synchronous)
Normal space
SRAM with byte selection
Normal space
SRAM with byte selection
SDRAM
32 Mbytes
64 Mbytes
64 Mbytes
8 or 16
bits*
8 or 16
bits*
8 or 16
bits*
Rev. 4.00 Dec. 15, 2009 Page 226 of 1558
REJ09B0181-0400