SH7080_09 Datasheet, PDF (469/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 10 Direct Memory Access Controller (DMAC)
• Single Address Mode
In single address mode, either the transfer source or transfer destination peripheral device is
accessed (selected) by means of the DACK signal, and the other device is accessed by an
address. In this mode, the DMAC performs one DMA transfer in one bus cycle, accessing one
of the external devices by outputting the DACK transfer request acknowledge signal to it, and
at the same time outputting an address to the other device involved in the transfer. For
example, in the case of transfer between external memory and an external device with DACK
shown in figure 10.8, when the external device outputs data to the data bus, that data is written
to the external memory in the same bus cycle.
This LSI
External address bus External data bus
DMAC
External
memory
External device
with DACK
Data flow
DACK
DREQ
Figure 10.8 Data Flow in Single Address Mode
Two kinds of transfer are possible in single address mode: transfer between an external device
with DACK and a memory-mapped external device, and transfer between an external device
with DACK and external memory. In both cases, only the external request signal (DREQ) is
used for transfer requests.
Rev. 4.00 Dec. 15, 2009 Page 409 of 1558
REJ09B0181-0400