SH7080_09 Datasheet, PDF (235/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 8 Data Transfer Controller (DTC)
Initial
Bit Bit Name Value
R/W
1, 0 ⎯
Undefined ⎯
[Legend]
x: Don't care
Description
Reserved
The write value should always be 0.
8.2.2 DTC Mode Register B (MRB)
MRB selects DTC operating mode. MRB cannot be accessed directly by the CPU.
Bit: 7
6
5
4
3
2
1
0
CHNE CHNS DISEL DTS
DM[1:0]
-
-
Initial value: -
-
-
-
-
-
-
-
R/W: -
-
-
-
-
-
-
-
Initial
Bit Bit Name Value
R/W Description
7
CHNE
Undefined ⎯
DTC Chain Transfer Enable
Specifies the chain transfer. For details, see section
8.5.6, Chain Transfer. The chain transfer condition is
selected by the CHNS bit.
0: Disables the chain transfer
1: Enables the chain transfer
6
CHNS
Undefined ⎯
DTC Chain Transfer Select
Specifies the chain transfer condition. If the following
transfer is a chain transfer, the completion check of the
specified transfer count is not performed and activation
source flag or DTCER is not cleared.
0: Chain transfer every time
1: Chain transfer only when transfer counter = 0
Rev. 4.00 Dec. 15, 2009 Page 175 of 1558
REJ09B0181-0400