SH7080_09 Datasheet, PDF (718/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 11 Multi-Function Timer Pulse Unit 2 (MTU2)
Operation when Error Occurs during Phase Counting Mode Operation, and Operation is
Restarted in Normal Mode: Figure 11.153 shows an explanatory diagram of the case where an
error occurs in phase counting mode and operation is restarted in normal mode after re-setting.
1
2
RESET TMDR
(PCM)
3
4
5
TIOR PFC TSTR
(1 init (MTU2) (1)
0 out)
6
Match
7
8
9
10
11
12
13
Error PFC TSTR TMDR TIOR PFC TSTR
occurs (PORT) (0) (normal) (1 init (MTU2) (1)
0 out)
MTU2 module output
TIOC*A
TIOC*B
Port output
PEn
Hi-Z
PEn
Hi-Z
n = 0 to 15
Figure 11.153 Error Occurrence in Phase Counting Mode, Recovery in Normal Mode
1. After a reset, MTU2 output is low and ports are in the high-impedance state.
2. Set phase counting mode.
3. Initialize the pins with TIOR. (The example shows initial high output, with low output on
compare-match occurrence.)
4. Set MTU2 output with the PFC.
5. The count operation is started by TSTR.
6. Output goes low on compare-match occurrence.
7. An error occurs.
8. Set port output with the PFC and output the inverse of the active level.
9. The count operation is stopped by TSTR.
10. Set in normal mode.
11. Initialize the pins with TIOR.
12. Set MTU2 output with the PFC.
13. Operation is restarted by TSTR.
Rev. 4.00 Dec. 15, 2009 Page 658 of 1558
REJ09B0181-0400