SH7080_09 Datasheet, PDF (895/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 16 Serial Communication Interface with FIFO (SCIF)
Transmitting Serial Data (Asynchronous Mode):
Figure 16.4 shows a sample flowchart for serial transmission.
Use the following procedure for serial data transmission after enabling the SCIF for transmission.
Start of transmission
Read TDFE flag in SCFSR
No
TDFE = 1?
Yes
Write transmit data in SCFTDR,
and read 1 from TDFE flag
[1]
and TEND flag in SCFSR,
then clear to 0
All data transmitted?
Yes
No
[2]
Read TEND flag in SCFSR
TEND = 1?
Yes
Break output?
Yes
Clear SPBDT to 0 and
set SPBIO to 1
No
No
[3]
Clear TE bit in SCSCR to 0
[1] SCIF status check and transmit data
write:
Read SCFSR and check that the
TDFE flag is set to 1, then write
transmit data to SCFTDR, and read 1
from the TDFE and TEND flags, then
clear to 0.
The number of transmit data bytes
that can be written is 16 - (transmit
trigger set number).
[2] Serial transmission continuation
procedure:
To continue serial transmission, read
1 from the TDFE flag to confirm that
writing is possible, then write data to
SCFTDR, and then clear the TDFE
flag to 0.
[3] Break output at the end of serial
transmission:
To output a break in serial
transmission, clear the SPBDT bit to
0 and set the SPBIO bit to 1 in
SCSPTR, then clear the TE bit in
SCSCR to 0.
In [1] and [2], it is possible to
ascertain the number of data bytes
that can be written from the number
of transmit data bytes in SCFTDR
indicated by the upper 8 bits of
SCFDR.
End of transmission
Figure 16.4 Sample Flowchart for Transmitting Serial Data
Rev. 4.00 Dec. 15, 2009 Page 835 of 1558
REJ09B0181-0400