SH7080_09 Datasheet, PDF (1238/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 22 I/O Ports
22.2.1 Register Descriptions
Port B is a 9-bit input/output port in the SH7083; a 10-bit input/output port in the SH7084,
SH7085, and SH7086. Port B has the following register. For details on register addresses and
register states during each processing, refer to section 27, List of Registers.
Table 22.3 Register Configuration
Register Name
Port B data register L
Port B port register L
Abbrevia-
tion
R/W Initial Value Address
Access Size
PBDRL
R/W H'0000
H'FFFFD182 8, 16
PBPRL
R
H'0xxx
H'FFFFD19E 8, 16
22.2.2 Port B Data Register L (PBDRL)
The port B data register L (PBDRL) is a 16-bit readable/writable register that stores port B data.
Bits PB9DR to PB4DR and PB2DR to PB0DR correspond to pins PB9 to PB4 and PB2 to PB0,
respectively (multiplexed functions omitted here) in the SH7083. Bits PB9DR to PB0DR
correspond to pins PB9 to PB0 (multiplexed functions omitted here) in the SH7084, SH7085, and
SH7086.
When a pin function is general output, if a value is written to PBDRL, that value is output directly
from the pin, and if PBDRL is read, the register value is returned directly regardless of the pin
state.
When a pin function is general input, if PBDRL is read, the pin state, not the register value, is
returned directly. If a value is written to PBDRL, although that value is written into PBDRL, it
does not affect the pin state. Table 22.4 summarizes port B data register read/write operations.
Rev. 4.00 Dec. 15, 2009 Page 1178 of 1558
REJ09B0181-0400