SH7080_09 Datasheet, PDF (1398/1622 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family

Section 26 Power-Down Modes
26.4 Sleep Mode
26.4.1 Transition to Sleep Mode
Executing the SLEEP instruction when the STBY bit in STBCR1 is 0 causes a transition from the
program execution state to sleep mode. However, sleep mode cannot be entered when the bus is
released (low-level input to BREQ pin). Although the CPU halts immediately after executing the
SLEEP instruction, the contents of its internal registers remain unchanged. The on-chip peripheral
modules continue to operate.
26.4.2 Canceling Sleep Mode
Sleep mode is canceled by a reset.
Do not cancel sleep mode with an interrupt.
(1) Canceling with Reset
Sleep mode is canceled by a power-on reset with the RES pin, a manual reset with the MRES pin,
or an internal power-on/manual reset by WDT.
Rev. 4.00 Dec. 15, 2009 Page 1338 of 1558
REJ09B0181-0400